This disclosure relates generally to the field of semiconductor processing. In particular, the disclosure is directed to processes for forming metal oxide-containing hardmask for EUV patterning.
Patterning of thin films in semiconductor processing is often a critical step in the fabrication of semiconductors. Patterning involves lithography. In conventional photolithography, such as 193 nm photolithography, patterns are printed by emitting photons from a photon source onto a mask and printing the pattern onto a photosensitive photoresist, thereby causing a chemical reaction in the photoresist that, after development, removes certain portions of the photoresist to form the pattern.
Advanced technology nodes (as defined by the International Technology Roadmap for Semiconductors) include nodes 22 nm, 16 nm, and beyond. In the 16 nm node, for example, the width of a typical via or line in a Damascene structure is typically no greater than about 30 nm. Scaling of features on advanced semiconductor integrated circuits (ICs) and other devices is driving lithography to improve resolution. One such approach is direct patterning of a photosensitive film, sometimes referred to as a EUV resist, with extreme ultraviolet (EUV) radiation.